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authorfpi2018-05-28 10:47:17 +0200
committerfpi2018-05-28 10:47:17 +0200
commiteb4ca2680a3d17cb57311d15198b86c884878d48 (patch)
tree6ee66031ccadbf6e343dbb780c7e54dbbdd637e2
parentMissed newline (diff)
Example cleanup
-rw-r--r--readme.org4
1 files changed, 1 insertions, 3 deletions
diff --git a/readme.org b/readme.org
index 80454bc..46d9473 100644
--- a/readme.org
+++ b/readme.org
@@ -147,10 +147,8 @@ plot data using 1:2 w l ls 2 t "V_{out}"
Circuit description:
#+NAME: dim1
-#+BEGIN_SRC spice :session test :var dim=dim1_params :results output
+#+BEGIN_SRC spice :session test :var dim=dim1_params :results output :eval never
,* DAC.asc
-.model NMOS NMOS
-.model PMOS PMOS
.model mosp pmos level=8 version=3.3.0
M1 0 VDD N005 N005 mosp l=$dim[5] w=$dim[4]
M2 VOUT VCTRL N005 N005 mosp l=$dim[5] w=$dim[4]